lulu9312 Bandgap_Reference — sky130 self-biased BGR

Why it is wrong

This is a self-biased current-mirror reference: the bias loop supplies its own gate voltages, so besides the intended operating point it has a second, self-consistent equilibrium at zero current (all mirrors off, gates parked at the rails). Every such reference needs an explicit startup circuit to guarantee it leaves that dead state on power-up — it is a categorical requirement, present in every textbook and every production reference. This netlist contains only the five core FETs (XM1–XM5), two resistors and four PNPs. There is no startup transistor at all.

Reproduction scenario

Power-up. With no startup device, the only thing that pulls the core out of the zero-current state is subthreshold and junction leakage. In the ngspice TT corner it does eventually reach the good value (Vref = 1.2009 V), but only after ~3–10 ms — a real startup circuit does this in microseconds — and a forced zero-current state likewise creeps out only via leakage. That the model happens to start it is the trap, not the reassurance: leakage-driven startup is slow and is not dependable at the corners where subthreshold current collapses (cold) or where the supply ramps quickly.

Confirmed by

ngspice: from a cold supply ramp and from a forced zero-current initial condition, the core reaches 1.2009 V only via leakage, on a millisecond timescale. Positive control under the identical harness — the sibling sky130 reference avsdbgp (commit c32c8c8), which DOES include a startup circuit (XM6/XM7/XM8) — was forced into the same dead state and recovered deterministically to 1.2023 V. The one structural difference is the startup circuit this design omits.

Why it matters

A reference that can sit dead, or that starts only when leakage happens to be strong enough, is a field-return generator — the precise failure a startup circuit exists to prevent, and a mandatory sign-off item for any reference or bias a company like TI would ship.

Why it is wrong

The purpose of a bandgap reference — and the README goal here, “constant … irrespective of supply variations” — is a supply-independent output. But the PMOS mirror (XM3/XM4/XM5) is a plain, un-cascoded mirror with no regulation amplifier, so its current rises with VDD through channel-length modulation. Because Vref = Vbe + I·R2, the output rides the supply directly.

Reproduction scenario

Sweep the supply around the nominal operating point. Vref = 1.175 V at VDD = 3.0 V and 1.222 V at VDD = 3.55 V — about 85 mV/V right around the design’s own 3.3 V rail; across a 2.0–3.6 V sweep the “reference” ranges 1.01–1.23 V. The supply current tracks VDD in lockstep (14.6 µA → 16.9 µA over 2.5 → 3.3 V), which is the mechanism.

Confirmed by

ngspice DC sweep, reproduced by hand: Vref(3.0 V) = 1.175, Vref(3.3 V) = 1.201, Vref(3.55 V) = 1.222 → ≈85 mV/V. A usable voltage reference achieves under 10 mV/V (good ones under 1 mV/V); this is roughly 10–100× worse and defeats the stated purpose. The avsdbgp control, which carries structure this mirror lacks, measures ~37 mV/V under the same harness — still modest, but less than half. It escapes the project’s own verification for a simple reason the README states outright: the reported analysis is a TT-corner sweep "over the temperature range of -40 to 125", i.e. temperature only. The supply half of the claim is never swept, so nothing in the flow could have shown it.

Why it matters

A reference whose output moves 85 mV per volt of supply is not a reference — anything it biases (comparator thresholds, ADC full-scale, LDO set-points) inherits the supply movement the block was supposed to remove. Supply rejection is a first-order acceptance spec for references at a company like TI.